Steinman Recruiting Associates

Since 1983, Richard Steinman has focused on bringing the right people and resources together.  Engaged by employers hiring Top Talent. Sought out by professionals seeking an outstanding career opportunity. Contact us today to understand why a relationship with Steinman Recruiting is a game changer.

Engineer - SoC Packaging Design
5/30/2025
San Jose, CA
Direct HireHybrid
Reporting to the Director Packaging Design you will be a key senior technical contributor on a high-skill, multi-site, cross-functional team pushing the envelope in customer driven high-speed SoC packaging design . You will own the package designs, as well as all processes from beginning to end. Strong presentation and communication skills. Great opportunity to move up the technical ladder.   You will have a broad knowledge of  semiconductor packaging design, modeling, extraction, and simulations .  Substrate design focus on
SoC Design Engineer
5/30/2025
Santa Clara, CA
Direct HireHybrid
We seek a skilled front-end SoC design engineer. A customer driven professional with a track record of effective collaboration with internal and external teams. A key contributor developing robust next generation digital design solutions. These are customer specific chiplets with challenging performance – power requirements. Great team members and leadership. Technical growth with cutting edge tech. Excellent work-life balance. Hybrid Santa Clara, CA. Flexible hours.     You will: Work at the h ardware level of SOC design . Support customer’s
Engineers - TS/SCI - Digital Signal Processing - Software & Systems
5/30/2025
USA
Direct HireOn-Site
We seek passionate engineering talent in the digital signal processing space to make significant contributions to our Nation’s defense and intelligence communities. Our clients are smaller, boutique, and employee owned. All are highly successful with proven track records of delivering exceptional solutions to difficult problems.   All positions will require a Top-Secret clearance with access to Sensitive Compartmented Information (TS/SCI).  An active TS SCI within the past 2 years is mandatory.   Technology stacks typically include several of the following
Design Verification Engineers - SystemVerilog - USA
5/30/2025
Austin, TX
Direct HireHybrid
We seek engineering talent with proven accomplishments in either complex digital or mixed signal design verification. You will create design verification solutions in a SystemVerilog environment. Design test bed solutions from scratch. UVM libraries. Test bench code.  Our clients derive significant revenue developing the latest in the power, wireless, mobile, digital health, automotive, AI, AR, Deep and Machine Learning. Next generation IC designs (Mixed Signal, Digital, Analog, ASIC, SoC, CPU, GPU, FPGA) .    * We also have additional opportunities with awesome clients

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