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Senior ASIC Engineer

San Jose, CA

Posted 11/19/2025

🚨 TOP ENGINEER JOB POST!!! 🚨

Confidential Search for International Employer

Industry: Electronics / Semiconductors
Degree: BSEE Required (MSEE Preferred)
Experience: 10+ years with Full ASIC/SoC Lifecycle

💎 CUTTING-EDGE CUSTOM ASICs & SOCs FOR EMERGING TECHNOLOGIES 💎

Role: Senior ASIC Engineer - ARM-Based Systems 🔬

Join a cutting-edge developer of custom ASICs and SoCs for emerging technologies as a Senior ASIC Design Engineer in San Jose! This role is ideal for engineers with stable work histories, strong customer-facing experience, and a track record of owning the full ASIC/SoC lifecycle from initial specifications through delivery. Work as a real contributor, often independently or as part of a small team on full project lifecycle from inception to tape-out with leading-edge technology projects for top companies. Lead ASIC/SoC architecture and micro-architecture development from concept through production while collaborating closely with customers to refine requirements and ensure successful delivery. Drive design reviews, documentation, verification support, and cross-functional technical alignment while providing technical leadership across security, debug, and RAS features in ARM-based systems. Experience working in small, fast-moving companies is highly valued, with exposure to chiplets and datacenter applications being a strong plus.

Requirements: 🎓

✅ BSEE required (MSEE or advanced degree preferred)

✅ 10+ years senior-level background in ASIC/SoC development with full project ownership

✅ STABLE WORK HISTORY required - no job hoppers or extensive contracting backgrounds

✅ Experience with full ASIC/SoC lifecycle from inception to tape-out on major projects

✅ SECURITY EXPERTISE: Deep knowledge of SoC security architecture in ARM-based systems

✅ Hardware Root-of-Trust and Secure Boot implementation experience

✅ ARM TrustZone, MMU/MPU expertise required

✅ Experience with cryptographic engines, secure debug, TRNG, OTP/fuses, and tamper detection

✅ DEBUG EXPERTISE: Strong experience with ARM CoreSight debug architectures

✅ Experience with trace components, external debug interfaces, and software tools

✅ Secure debug expertise highly desired

✅ RAS EXPERTISE: Hands-on experience implementing ARM RAS features

✅ Error detection, reporting/poisoning, fault injection experience

✅ Interconnect/fabric error management expertise

✅ Experience working in small, fast-moving companies highly valued

✅ Strong customer-facing experience and excellent communication skills

✅ Exposure to chiplets and datacenter applications is a strong plus

✅ Local to San Jose, CA area GREATLY PREFERRED

What's in it for you? 💼

✅ Exceptional annual salary of $180,000 to $230,000

✅ Performance bonus included

✅ Outstanding retirement programs

✅ Partially remote work options available

✅ Willing to sponsor work authorization for qualified candidates

✅ Leading custom ASIC and SoC development company with pipeline of new technology projects

✅ Work with top companies on cutting-edge emerging technologies

✅ Be a real contributor working independently or as part of small team

✅ Work on full project lifecycle from inception to tape-out

✅ Lead ASIC/SoC architecture and micro-architecture development

✅ Direct collaboration with customers on requirements and delivery

✅ Provide technical leadership on security, debug, and RAS features

✅ Work with ARM-based systems, chiplets, and datacenter applications

✅ Small, fast-moving company environment with broad responsibilities

✅ Well-defined pipeline of leading-edge technology projects

✅ Extensive IP portfolio and well-known customer base

✅ Growing company with excellent career opportunities

Confidential Placement 🔍

This role is a confidential placement for a leading custom ASIC and SoC development company. We will manage your application with the highest level of privacy and professionalism.

Location: San Jose, California, USA (Partially remote options)
Note: Local San Jose candidates GREATLY PREFERRED. Stable work history required. Client willing to sponsor work authorization for exceptional candidates. No relocation assistance.

#ASICEngineering #SoC #Semiconductors #ARMArchitecture #CaliforniaCareers #SiliconValley

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